iPod Programming

2004-06-13 gcc 2.95.3 and 3.4.0 dhrystone numbers with cache and cpu speed
2004-06-08 arm ads 1.2 dhrystone numbers
2004-06-04 gcc 2.95.3, gcc 3.2.2 dhrystone numbers
2004-06-03 Hello World! and initial gcc 3.4.0 dhrystone numbers

This is an attempt to provide some examples for low level iPod programming. The ipodlinux.sourceforge.net folks have done a a great job of figuring things out and getting linux running on the iPod. I am more hands on than that, Linux is too far removed from the hardware.

The first thing you will need is a compiler, here are some instructions for building your own gcc cross compiler. I know this compiler works on Linux, depending on what version of gcc you want to build this may not work on windows under mingw or cygwin.
This first example is a blatant ripoff from the ipodlinux folks, I took this basic example which makes a cute sound, added the use of a usec timer in the ipod and the bit that controls the backlight. When run the program will blink the backlight on/off once a second. You will need the ipodlinux loader from the ipodlinux folks. I simply followed the instructions in the ipodlinux loader README file, replacing linux.bin with blink_fw.bin. In fact if you follow the instructions from the README file in the ipodlinux loader, copy the apple firmware, make_fw, loader.bin, etc to the dir where you want to build blink_fw.bin the Makefile will build the final firware to load to the iPod as well as echo the command (sudo dd ...)

Ahh, I got the display working (you may need to tweak the contrast for your display, the code I borrowed (ipodlinux stuff) had different settings for each of the generations, mine is a g3).

I can now use printf which means I can start doing some dhrystone tests, and other tests, the first numbers out are (dhrystone):

GCC 3.4.0 ARM 24mhz no cache
973648 -O0
558759 -O1
550011 -O2
482736 -O3
GCC 3.4.0 ARM 24mhz cache
240040 -O0
121498 -O1
120493 -O2
103989 -O3
GCC 3.4.0 ARM 75mhz no cache
360006 -O0
199414 -O1
196367 -O2
172503 -O3
GCC 3.4.0 ARM 75mhz cache
87287 -O0
44178 -O1
43813 -O2
37810 -O3
GCC 3.4.0 THUMB (24mhz)
1098010 -O0
606010 -O1
607503 -O2
535394 -O3
GCC 3.2.2 ARM (24mhz)
980012 -O0
558756 -O1
574294 -O2
552863 -O3
GCC 3.2.2 THUMB (24mhz)
1216679 -O0
612006 -O1
I need to apply the gcse.c patch cant compile -O2 or -O3 right now
GCC 2.95.3 24mhz no cache
1015729 -O0
592507 -O1
590009 -O2
580008 -O3
GCC 2.95.3 24mhz cache
242383 -O0
136333 -O1
134909 -O2
132172 -O3
GCC 2.95.3 75mhz no cache
362506 -O0
212145 -O1
210003 -O2
206900 -O3
GCC 2.95.3 75mhz cache
88139 -O0
49572 -O1
49057 -O2
48061 -O3
ARM ADS build 848 ARM 24mhz no cache
402005 -Otime
ARM ADS build 848 THUMB 24mhz no cache
446256 -Otime
Source code for the above tests: gcc340-000.tar.gz

This is actually two utilities (disassemblers), right now compiled for windows/command prompt. source is included, should be ansi c and compile pretty much anywhere. build.c will take an arm binary file as an argument and basically wraps elf info around it so that you can use gnu's disassembler.

build myarmprog.bin
arm-thumb-elf-objdump -D test.elf > myarmprog.txt
The problem with this one is that it is zero based, so the address base is set to 0x00000000 instead of 0x40000000 or 0x28000000.
The other utility is idiss.c + diss32.c. It takes a binary file as an argument, and disassembles it directly. There is no guarantee the disassembly is accurate, but the source is there, please drop a note if you find any bugs.
There are cases where an address is calculated or derived, it may show S00000020 these are zero based as well instead of the correct base.
Enjoy, more to come.